VERILOG HDL
IntroductiontoVerilogHDL
ModelingConcepts
GateLevelModeling
DataFlowModeling
BehaviouralModeling
StructuralModeling
SwitchLevelModeling
DataTypes
Operators
ProcedureandFlowOfControlStatement
DesigningofCombinationalCircuits
DesigningofSequentialCircuits
FSMDesignModeling
DesigningofMemories
WritingTestbenchusingVerilog
TaskandFunctions
SystemTasks
CompilerDirectives
AdvanceNetsinVerilog
BusFunctionalModeling
VerilogBasedAssertions
CodeCoverage&FPGAImplementation